简介
本书全面介绍现代VLSI芯片最新设计技术和方法，并重点讨论基于IP
核的SoC设计方法。书中反映出了SOC芯片设计的新进展以及新技术。全书
共分8章。内容包括数字系统与VLSI，制造与器件，逻辑门，组合逻辑电路
网络，时序电路状态机，版图设计以及体系结构设计。每章末尾均附有难
度不同的习题。附录中还提供了丰富而实用的词汇表以及硬件描述语言介
绍。
本书可作为高校电子工程、计算机科学与工程、微电子半导体等专业
的高年级本科生和研究生的教材或教学参考书，同时也非常适合作为从事
芯片设计的工程师以及从事该领域的研究和开发的工程技术人员的参考书
。
目录
chapter 1 digital systems and vlsi .
1.1 why design integrated circuits?
1.2 integrated circuit manufacturing
1.3 cmos technology
1.4 integrated circuit design techniques
1.5 ip-based design
1.6 a look into the future
1.7 summary
1.8 references
1.9 problems
chapter 2 fabrication and devices
2.1 introduction
2.2 fabrication processes
2.3 transistors
2.4 wires and vias
2.5 fabrication theory and practice
2.6 reliability
2.7 layout design and tools
2.8 references
2.9 problems
.chapter 3 logic gates
3.1 introduction
3.2 combinational logic functions
3.3 static complementary gates
3.4 switch logic
3.5 alternative gate circuits
3.6 low-power gates
3.7 delay through resistive interconnect
3.8 delay through inductive interconnect
3.9 design-for-yield
3.10 gates as ip
3.11 references
3.12 problems
chapter 4 combinational logic networks
4.1 introduction
4.2 standard cell-based layout
4.3 combinational network delay
4.4 logic and interconnect design
4.5 power optimization
4.6 switch logic networks
4.7 combinational logic testing
4.8 references
4.9 problems
chapter 5 sequential machines
5.1 introduction
5.2 latches and flip-flops
5.3 sequential systems and clocking disciplines
5.4 performance analysis
5.5 clock generation ..
5.6 sequential system design
5.7 power optimization
5.8 design validation
5.9 sequential testing
5.10 references
5.11 problems
chapter 6 subsystem design
6.1 introduction
6.2 combinational shifters
6.3 adders
6.4 alus
6.5 multipliers
6.6 high-density memory
6.7 image sensors
6.8 field-programmable gate arrays
6.9 programmable logic arrays
6.10 buses and networks-on-chips
6.11 data paths
6.12 subsystems as ip
6.13 references
6.14 problems
chapter 7 floorplanning
7.1 introduction
7.2 floorplanning methods
7.3 global interconnect
7.4 floorplan design
7.5 off-chip connections
7.6 references
7.7 problems
chapter 8 architecture design
8.1 introduction
8.2 hardware description languages
8.3 register-transfer design
8.4 pipelining
8.5 high-level synthesis
8.6 architectures for low power
8.7 gals systems
8.8 architecture testing
8.9 ip components
8.10 design methodologies
8.11 multiprocessor system-on-chip design
8.12 references
8.13 problems
appendix a a chip designer's lexicon
appendix b hardware description languages
b.1 introduction
b.2 verilog
b.3 vhdl
references
index ...
1.1 why design integrated circuits?
1.2 integrated circuit manufacturing
1.3 cmos technology
1.4 integrated circuit design techniques
1.5 ip-based design
1.6 a look into the future
1.7 summary
1.8 references
1.9 problems
chapter 2 fabrication and devices
2.1 introduction
2.2 fabrication processes
2.3 transistors
2.4 wires and vias
2.5 fabrication theory and practice
2.6 reliability
2.7 layout design and tools
2.8 references
2.9 problems
.chapter 3 logic gates
3.1 introduction
3.2 combinational logic functions
3.3 static complementary gates
3.4 switch logic
3.5 alternative gate circuits
3.6 low-power gates
3.7 delay through resistive interconnect
3.8 delay through inductive interconnect
3.9 design-for-yield
3.10 gates as ip
3.11 references
3.12 problems
chapter 4 combinational logic networks
4.1 introduction
4.2 standard cell-based layout
4.3 combinational network delay
4.4 logic and interconnect design
4.5 power optimization
4.6 switch logic networks
4.7 combinational logic testing
4.8 references
4.9 problems
chapter 5 sequential machines
5.1 introduction
5.2 latches and flip-flops
5.3 sequential systems and clocking disciplines
5.4 performance analysis
5.5 clock generation ..
5.6 sequential system design
5.7 power optimization
5.8 design validation
5.9 sequential testing
5.10 references
5.11 problems
chapter 6 subsystem design
6.1 introduction
6.2 combinational shifters
6.3 adders
6.4 alus
6.5 multipliers
6.6 high-density memory
6.7 image sensors
6.8 field-programmable gate arrays
6.9 programmable logic arrays
6.10 buses and networks-on-chips
6.11 data paths
6.12 subsystems as ip
6.13 references
6.14 problems
chapter 7 floorplanning
7.1 introduction
7.2 floorplanning methods
7.3 global interconnect
7.4 floorplan design
7.5 off-chip connections
7.6 references
7.7 problems
chapter 8 architecture design
8.1 introduction
8.2 hardware description languages
8.3 register-transfer design
8.4 pipelining
8.5 high-level synthesis
8.6 architectures for low power
8.7 gals systems
8.8 architecture testing
8.9 ip components
8.10 design methodologies
8.11 multiprocessor system-on-chip design
8.12 references
8.13 problems
appendix a a chip designer's lexicon
appendix b hardware description languages
b.1 introduction
b.2 verilog
b.3 vhdl
references
index ...
Modern VLSI design:IP-based design
- 名称
- 类型
- 大小
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