简介
Ken Arnold is an experienced embedded systems designer andpresident of HiTech Equipment, Inc., an embedded systems design firm located in San Diego, California. He also teaches courses in embedded hardware and software design at the University of California-San Diego. Gives the reader an integrated hardware/software approach to embedded controller design Stresses a "worst case" design approach for the harsh environments in which embedded systems are often used Includes design examples to make important concepts come alive.
目录
Front Cover 1
Embedded Controller Hardware Design 4
Copyright Page 5
Table of Contents 8
Preface 11
Chapter One. Review of Electronics Fundamentals 14
Objectives 15
Embedded Microcomputer Applications 15
Microcomputer and Microcontroller Architectures 17
Digital Hardware Concepts 19
Logic Symbols 30
Timing Diagrams 32
Multiplexed Bus 33
Loading and Noise Margin Analysis 34
The Design and Development Process 34
Chapter One Problems 35
Chapter Two. Microcontroller Concepts 36
Organization: von Neumann vs. Harvard 37
Microprocessor/Microcontroller Basics 37
The 8051 Family Microcontroller Processor Architecture 40
The 8051 Family Microcontroller Instruction Set Summary 55
Chapter Two Problems 69
Chapter Three. Worst-Case Timing, Loading, Analysis, and Design 70
Timing Diagram Notation Conventions 71
Fan-Out and Loading Analysis\u2014DC and AC 76
Logic Family IC Characteristics and Interfacing 88
Design Example: Noise Margin Analysis Spreadsheet 95
Worst-Case Timing Analysis Example 103
Chapter Three Review Problems 105
Chapter Four. Memory Technologies and Interfacing 108
Memory Taxonomy 109
Read/Write Memories 113
Read-Only Memory 114
Other Memory Types 117
JEDEC Memory Pin-Outs 118
Device Programmers 119
Memory Organization Considerations 120
Parametric Considerations 122
Asynchronous vs. Synchronous Memory 123
Error Detection and Correction 124
Memory Management 126
Chapter Four Problems 128
Chapter Five. CPU Bus Interface and Timing 130
Read and Write Operations 130
Address, Data, and Control Buses 131
Address Spaces and Decoding 133
Chapter Five Problems 137
Chapter Six. A Detailed Design Example 138
The Central Processing Unit (CPU) 138
External Data Memory Cycles 147
Design Problem 1 151
Design Problem 2 152
Design Problem 3 153
Chapter Six Problems 156
Chapter Seven. Programmable Logic Devices 158
Introduction to Programmable Logic 160
Design Examples 166
Simple I/O Decoding and Interfacing Using PLDs 170
IC Design Using PCs 170
Chapter Seven Problems 172
Chapter Eight. Basic I/O Interfaces 174
Direct CPU I/O Interfacing 174
Simple Input/Output Devices 182
Program-Controlled I/O Bus Interfacing 186
Direct Memory Access (DMA) 188
Elementary I/O Devices and Applications 191
Chapter Eight Problems 194
Chapter Nine. Other Interfaces and Bus Cycles 196
Interrupt Cycles 197
Software Interrupts 197
Hardware Interrupts 197
Chapter Ten. Other Useful Stuff 210
Construction Methods 210
Electromagnetic Compatibility 212
Electrostatic Discharge Effects 212
Fault Tolerance 213
Hardware Development Tools 214
Software Development Tools 216
Other Specialized Design Considerations 216
Processor Performance Metrics 219
Device Selection Process 220
Chapter Eleven. Other Interfaces 222
Analog Signal Conversion 223
Special Proprietary Synchronous Serial Interfaces 224
Unconventional Use of DRAM for Low Cost Data Storage 224
Digital Signal Processing/Digital Audio Recording 225
Appendix A. Hardware Design Checklist 228
Appendix B. References, Web Links, and Other Sources 238
Index 242
Elsevier Science CD-ROM License Agreement 248
Embedded Controller Hardware Design 4
Copyright Page 5
Table of Contents 8
Preface 11
Chapter One. Review of Electronics Fundamentals 14
Objectives 15
Embedded Microcomputer Applications 15
Microcomputer and Microcontroller Architectures 17
Digital Hardware Concepts 19
Logic Symbols 30
Timing Diagrams 32
Multiplexed Bus 33
Loading and Noise Margin Analysis 34
The Design and Development Process 34
Chapter One Problems 35
Chapter Two. Microcontroller Concepts 36
Organization: von Neumann vs. Harvard 37
Microprocessor/Microcontroller Basics 37
The 8051 Family Microcontroller Processor Architecture 40
The 8051 Family Microcontroller Instruction Set Summary 55
Chapter Two Problems 69
Chapter Three. Worst-Case Timing, Loading, Analysis, and Design 70
Timing Diagram Notation Conventions 71
Fan-Out and Loading Analysis\u2014DC and AC 76
Logic Family IC Characteristics and Interfacing 88
Design Example: Noise Margin Analysis Spreadsheet 95
Worst-Case Timing Analysis Example 103
Chapter Three Review Problems 105
Chapter Four. Memory Technologies and Interfacing 108
Memory Taxonomy 109
Read/Write Memories 113
Read-Only Memory 114
Other Memory Types 117
JEDEC Memory Pin-Outs 118
Device Programmers 119
Memory Organization Considerations 120
Parametric Considerations 122
Asynchronous vs. Synchronous Memory 123
Error Detection and Correction 124
Memory Management 126
Chapter Four Problems 128
Chapter Five. CPU Bus Interface and Timing 130
Read and Write Operations 130
Address, Data, and Control Buses 131
Address Spaces and Decoding 133
Chapter Five Problems 137
Chapter Six. A Detailed Design Example 138
The Central Processing Unit (CPU) 138
External Data Memory Cycles 147
Design Problem 1 151
Design Problem 2 152
Design Problem 3 153
Chapter Six Problems 156
Chapter Seven. Programmable Logic Devices 158
Introduction to Programmable Logic 160
Design Examples 166
Simple I/O Decoding and Interfacing Using PLDs 170
IC Design Using PCs 170
Chapter Seven Problems 172
Chapter Eight. Basic I/O Interfaces 174
Direct CPU I/O Interfacing 174
Simple Input/Output Devices 182
Program-Controlled I/O Bus Interfacing 186
Direct Memory Access (DMA) 188
Elementary I/O Devices and Applications 191
Chapter Eight Problems 194
Chapter Nine. Other Interfaces and Bus Cycles 196
Interrupt Cycles 197
Software Interrupts 197
Hardware Interrupts 197
Chapter Ten. Other Useful Stuff 210
Construction Methods 210
Electromagnetic Compatibility 212
Electrostatic Discharge Effects 212
Fault Tolerance 213
Hardware Development Tools 214
Software Development Tools 216
Other Specialized Design Considerations 216
Processor Performance Metrics 219
Device Selection Process 220
Chapter Eleven. Other Interfaces 222
Analog Signal Conversion 223
Special Proprietary Synchronous Serial Interfaces 224
Unconventional Use of DRAM for Low Cost Data Storage 224
Digital Signal Processing/Digital Audio Recording 225
Appendix A. Hardware Design Checklist 228
Appendix B. References, Web Links, and Other Sources 238
Index 242
Elsevier Science CD-ROM License Agreement 248
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